Berkeley Lab’s John Shalf Ponders the Future of HPC Architectures

Editor’s note: Ahead of John Shalf’s well-attended and well-received “high-bandwidth” keynote at ISC 2019, Shalf discussed the talk’s major themes in an interview with Berkeley Lab’s Kathy Kincade. 

What will scientific computing at scale look like in 2030? With the impending demise of Moore’s Law, there are still more questions than answers for users and manufacturers of HPC technologies as they try to figure out what their next best investments should be. As he prepared to head to ISC19 in Frankfurt, Germany, to give a keynote address on the topic, John Shalf – who leads the Computer Science Department in Lawrence Berkeley National Laboratory’s Computational Research Division – shared his thoughts on what the future holds for computing technologies and architectures in the era beyond exascale. ISC took place June 16-20; Shalf’s keynote was on Tuesday, June 18.

What was the focus of your keynote at ISC?

What the landscape of computing, in general, is going to look like after the end of Moore’s Law. We’ve come to depend on Moore’s Law and to really expect that every generation of chips will double the speed, performance, and efficiency of the previous generation. Exascale will be the last iteration of Moore’s Law before the bottom drops out – and the question then is, how do we continue? Is exascale the last of its kind, or are we going to embark on a first-of-its-kind machine for the future of computing?

Read the full interview, with Kathy Kincade, on HPCwire.com.

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